Curva brings generation, verification, and post-design prep under one roof — so curvilinear layout is something you can produce, trust, and tape out, not just admire in a paper.
Each stage hands a cleaner, more optimized layout to the next — built to slot into established physical-design flows rather than replace them wholesale.
Start from existing cells, nets, and process rules. Curva reads the design and the constraints it must honor before a single curve is drawn.
Layout is generated as path-based curvilinear geometry, process-aware from the start — opening a design space that 90°-only tools can't describe.
Geometry is checked with DRC and against OPC and inverse-lithography behavior, confirming the design converges to what the wafer will print.
The verified design is carried through post-design data preparation toward mask — a manufacturable, tape-out-ready result for the rest of the flow.
Curva is designed to work alongside the tools and libraries your team already uses — taking standard design and process inputs, and returning manufacturable, verified geometry that continues down your existing pipeline.
The goal is augmentation, not disruption: curvilinear optimization as a stage in the flow you trust.
We're setting up pilot collaborations with semiconductor and EDA teams. To evaluate Curva on your own cells and constraints, start a conversation.